Curriculum Vitae KIM, Jong Professor Dept. of Comp. Sci. & Eng. Pohang University of Science and Technology San-31, Hyoja-dong, Pohang 790-783, KOREA Phone: +(82)-562-279-2257 Fax: +(82)-562-279-2299 Email: jkim@postech.ac.kr WWW: http://www.postech.ac.kr/~jkim RESEARCH INTERESTS: ================== Fault-Tolerant Computing and Dependability Evaluation Process resiliency, Replicated Process Allocation, Checkpointing schemes, Dependability Evaluation Parallel and Distributed Computer Architectures Router Design, Communication Analysis, Real-time Task Allocation Load Distribution, Parallel Structure Electronic Commerce Network Security, Cryptography, Secure Transaction Protocol Performance Evaluation Queueing Analysis, Simulation Analysis, Experimental Analysis EDUCATION: ========= Ph.D.: Computer Engineering, The Pennsylvania State University, University Park, PA, U.S.A., May 1991. Thesis Title : Evaluation of Hypercube-based Multiprocessor Systems Advisor : Chita R. Das M.S.: Computer Science, Korea Advanced Institute of Science and Technology, Seoul, Korea, Feb. 1983. Thesis Title : A Stream Supporting Dataflow Machine B.S.: Electronic Engineering, Hanyang University, Seoul, Korea, Feb. 1981 PROFESSIONAL EXPERIENCE: ======================= Aug. 1992 -- Present : Associate Professor, Department of Computer Science and Engineering, Pohang University of Science and Technology. Jan. 1991--Jul. 1992 : Post-Doctoral Research Fellow (under Prof. K. G. Shin), Division of Computer Science and Engineering, Department of Electrical Engineering and Computer Science, The University of Michigan. Jun. 1987--Dec. 1990 : Graduate Research Assistant, Computer Engineering Program (under Dr. C. Das), Dependability and Performance Models for Parallel Computers. Mar. 1983--Aug. 1986 : System Analyst, Korea Securities Computing Company, Korea. Research Projects: ================== [1] "Dependability Evaluation of Commercial Fault-tolerant systems," funded by Korea Securities Computer Corp. (KOSCOM), 1993. In this project, we surveyed commercially available fault-tolerant systems and analyzed their fault-tolerance techniques and capabilities. [2] "Task allocation for load distribution in fault-tolerant systems," funded by Korea Science and Engineering Fund (KOSEF), 1994-1996. In this project, we proposed a replicated-process allocation algorithm for load distribution on fault-tolerant systems. The result was presented on FTCS'95 and IEEE TC '96. [3] "Parallel Algorithms for Chained Matrix Multiplication," funded by Korea Research Foundation (KRF), 1996. In this project, matrix multiplication sequence and processor allocation schemes for chained matrix multiplication is studied to reduce the total completion time. [4] "Parallel Algorithms for Scientific Computing," funded by STEPI, 1997-1999. In this project, the task allocation and scheduling algorithms for large scientific problems are studied. [5] "A Study on the Security Severity of DACOM network and Improving the Security," funded by DACOM 1996. In this project, the network and system securities of DACOM network and systems are analyzed. [6] "Development of Hacking Simulation Tool," funded by Korea Telecom, 1997-1998. In this project, a hacking simulation tool which checks the vulnerability of computer systems is developed. [7] "Development of Internet Electronic Payment System," funded by POSCO Research Fund, 1999. In this project, an electronic payment system for POSCO EDI/CALS system is under development. PUBLICATIONS: ============ Refereed Journals : [1] J. Kim, C. R. Das, W. Lin, and T. Y. Feng, ``Reliability Evaluation of Hypercube Multicomputers," IEEE Trans. on Reliability, Special Issue on Reliability of Parallel and Distributed Computing Networks, Apr. 1989, pp. 121--129. [2] J. Kim, C. R. Das, and W. Lin, ``A Top-down Processor Allocation Scheme for Hypercube Computers," IEEE Trans. on Parallel and Distributed Systems, Jan. 1991, pp. 20--30. [3] C. R. Das and J. Kim, ``A Unified Task-based Dependability Models for Hypercube Computers," IEEE Trans. on Parallel and Distributed Systems, May 1992. [4] J. Kim and K. G. Shin, ``Deadlock--Free Routing in an Injured Hypercube,'' IEEE Trans. on Computers, Sep. 1993. [5] J. Kim and C. R. Das, ``Hypercube Communication Delay with Wormhole Routing,'' IEEE Trans. on Computers, July 1994, pp. 806--814. [6] J. Kim and K. G. Shin, ``Operationally--Enhanced Folded Hypercubes,'' IEEE Trans. on Parallel and Distributed Systems, Dec. 1994, pp. 1310--1316. [7] J. Kim and K. G. Shin, ``Execution Time Analysis of Communicating Tasks in Distributed Systems,'' IEEE Trans. on Computers, May 1996, pp. 572--579. [8] J. Kim, H. Lee, and S. Lee, ``Replicated Process Allocation for Load Distribution in Fault-Tolerant Multicomputers," IEEE Trans. on Computers, Apr. 1997, pp. 499--505. [9] S. Lee and J. Kim, ``Path Selection for Message Passing in a Circuit-Switched Multicomputer," Journal of Parallel and Distributed Computing, Jul. 1996, pp. 211-218. [10] J. B. Kim, S. J. Hong, and J. Kim, ``New Circuits for XOR and XNOR functions," International Journal of Electronics, Vol. 82, No. 2, Feb. 1997, pp. 131--143. [11] J. B. Kim, S. J. Hong, and J. Kim, "A CMOS Built-in Current Sensor," International Journal of Electronics, Vol. 85, No. 2, pp. 181-205, Feb. 1998. [12] J. B. Kim, S. J. Hong, and J. Kim, "Design of a Built-In Current Sensor for Iddq Testing," IEEE Journal of Solid States, Vol 33, No. 8, pp. 1266-1272, Aug. 1998. [13] H. W. Kim, H. S. Lee, S. Lee, and J. Kim, "Adaptive Virtual Cut-Through as a Viable Routing Method," Journal of Parallel and Distributed Computing, No. 52, pp. 82-95, 1998. [14] O. H. Kwon, S. J. Hong, and J. Kim, "A Boolean Factorization using an Extended Boolean Matrix," IEICE Transactions on Information and Systems, Vol. E81-D, No. 12, pp. 1466-1472, Dec 1998. [15] W. Y. Lee, S. J. Hong, and J. Kim, "Dynamic Load Distribution on a Mesh with a Single Bus," Vol. 9, No. 4, pp. 337-357, 1998, International Journal of High Speed Computing. [16] S. H. Chae, J. Kim, S. J. Hong, and S. Lee, "Design and Analysis of the Dual-Torus Network," New Generation Computing, Vol. 17, No. 3, pp. 229-254, May 1999. [17] K. W. Nam, S. Lee, and J. Kim, "Synchronous Load Balancing in Hypercube Multicomputers witj Faulty Nodes," Journal of Parallel and Distributed Computing, Vol. 58, No. 1, pp 26-53, July 1999. [18] H. Lee, J. Kim, and S. J. Hong, "Evaluation of Two Load-Balancing Primary-Backup Process Allocation Schemes," IEICE Transactions on Information and Systems, Vol. E82-D, No. 12, pp. 118-127, Dec. 1999. [19] H. Lee, J. Kim, S. J. Hong, and S. Lee, "Scheduling Matrix Chain Products on Parallel Systems," Submitted to Parallel Processing Letters, Dec. 1998. [20] H. Lee, J. Kim, S. J. Hong, and S. Lee, "Processor Allocation and Task Scheduling of Matrix Chain Products on Parallel Systems," Submitted to IEEE Trans. on Parallel and Distributed Systems, May 1999. [21] W. Lee, S. J. Hong, and J. Kim, "On the Configuration of Switch-Based Networks with Wormhole Routing," Accepted for publication in Journal of Interconnection Networks, 2000. [22] H. Lee, J. Kim, S. J. Hong, and S. Lee, "Task Scheduling using a Block Dependency DAG for Block-Oriented Sparse Cholesky Factorization," Accepted for publication in Parallel Computing, 2000. [23] W. Lee, S. J. Hong, and J. Kim, "On-line Scheduling of Scalable Real-Time Tasks on Multiprocessor Systems," Submitted to Journal of Parallel and Distributed Computing, Feb. 2000. [24] K. Nam, S. Lee, and J. Kim, "Path Selection for Real-Time Communication in Wormhole Networks, Submitted to Journal of Parallel and Distributed Computing, Jan. 2000. \end{itemize} Proceedings: [1] C. R. Das and J. Kim, ``An Analytical Model for Computing Hypercube Availability," Proc. of 19th International Symposium on Fault Tolerant Computing Systems, Jun. 1989, pp. 530--537. [2] J. Kim, C. R. Das, and W. Lin, ``A Processor Allocation Scheme for Hypercube Computers," Proc. of 1989 International Conference on Parallel Processing, Vol-II, Aug. 1989, pp. 231--238, [3] J. Kim and C. R. Das, ``On Subcube Dependability in a Hypercube," Proc. of ACM SIGMETRICS, 1991, May 1991, pp. 111--119. [4] J. Kim and C. R. Das, ``Modeling Wormhole Routing in a Hypercube," Proc. of Int. Conf. on Distributed Systems, May 1991, pp. 380--393, IEEE Computer Society Outstanding Paper Award. [5] J. Kim, K. G. Shin, and C. R. Das, ``Performability Evaluation of Hypercube Multicomputers,'' IEEE Workshop on Fault--Tolerant Parallel and Distributed Systems, Jun. 1992. [6] P. Mohapatra, C. Yu, C. R. Das and J. Kim, ``A Lazy Scheduling Scheme for Improving Hypercube Performance,'' Proc. of 1993 International Conference on Parallel Processing, Vol-III, Aug. 1993, pp. 110--117. [7] S. G. Lee and J. Kim, ``Path Selection for Communicating Tasks in a Wormhole-Routed Multicomputer,'' Proc. of 1994 International Conference on Parallel Processing, Aug. 1994. [8] D. S. Kim, Seung-Hoon Kim, and J. Kim, ``Fast SIMD Algorithms on a Mesh with Wormhole Routing", Transputer Applications and Systems '94, IOS Press, pp. 247--258. [9] J. Kim, Heejo Lee, and K. G. Shin, ``A Hybrid Reconfiguration Scheme for Real-Time Fault-Tolerant Systems," 1st International Workshop on Real-Time Computing Systems and Applications, Dec. 1994, Seoul. [10] J. Kim, Heejo Lee, and S. G. Lee, ``Process Allocation for Load Distribution in Fault-Tolerant Multicomputers," Proc. of International Symposium on Fault-Tolerant Computing, June 1995, pp. , Pasadena, CA, USA. [11] H. S. Lee, H. W. Kim, J. Kim, and S. G. Lee, ``Adaptive Virtual Cut-through as an Alternate to Wormhole Routing," Proc. of 1995 International Conference on Parallel Processing, Aug. 1995, pp. , Oconomowoc, WI, USA. [12] H. Choi, S. J. Hong, and J. Kim, "Multi-Level Logic Synthesis Based on the Modified Map-Factoring Method," Joint Technical Conference on Circuits, Computers, and Communications, Jul. 1995, pp. 471--474, Kumamoto, Japan. [13] S. H. Chae, J. Kim, D. S. Kim, S. J. Hong, and S. G. Lee, ``DTN : A New Partitionable Torus Topology," Proc. of 1995 International Conference on Parallel Processing, Aug. 1995. [14] H. Lee, K. Toda, J. Kim, K. Nishida, E. Takahashi, and Y. Yamaguchi, "Performance Comparison of Real-Time Architectures Using Simulation," @nd International Workshop on Real-Time Computing Systems and Applications, Oct. 1995, Tokyo, Japan, to be appeared. [16] H. Lee, J. Kim, S.J. Hong, B. Yae, and H. Kim, ``Fault-Tolerant Process Allocation with Load Balancing," 1995 Pacific Rim International Symposium on Fault-Tolerant Systems, Dec. 1995, Newport Beach, CA, USA. [17] A. Vaidya, B.S. Yoo, C.R. Das, and J. Kim, "A Task-based Dependability Model for k-ary n-cubes," 1996 ICPP, pp. I-9 -- I-16, Aug. 1996, Chicago, 1996. [18] H. Lee, J. Kim, and S. J. Hong, "Processor Allocation for Matrix Products," Proceedings of the Sixth Parallel Computing Workshop, pp. SE-1 -- SE-7, Nov. 1996, Kawasaki, Japan. [19] H. Lee, J. Milburn, and J. Kim, "Witch Hunt," The Unix Network Security Conference, pp. 11-1 -- 11-12, Nov. 1996, Washington D.C., U.S.A. [20] H. C. Nam, J. Kim, S. J. Hong, and S. G. Lee, "Probabilistic Checkpointing," 27th Fault-Tolerant Computing Symposium (FTCS-27), pp. 48--57, June 1997, Seattle, U.S.A. [21] O.H. Kwon, J. Kim, S. J. Hong, and S. G. Lee, "Real-Time Job Scheduling in Hypercube Systems," 1997 International Conference on Parallel Processing (ICPP-26), pp. 166--169, Aug. 1997, Chicago, U.S.A. [22] H. Lee, J. Kim, S. J. Hong, and S. G. Lee, "Evaluation of Matrix Chain Products on Parallel Systems," Parallel and Distributed Computer Systems '97 (PDCS'97), pp. 124--129, Oct. 1997, Washington D.C., U.S.A. [23] K. D. Ahn, J. Kim, and S. J. Hong, "Fault-Tolerant Real-Time Scheduling using Passive Replicas," 1997 Pacific-Rim Fault-Tolerant Systems (PRFTS'97), Dec. 1997, Taipei, Taiwan. [24] W. Y. Lee, S. J. Hong, and J. Kim, "Dynamic Load Distribution on a Mesh with a Single Bus," 1997 International Conference on Parallel and Distributed Systems (ICPAD), pp 368-375, Dec. 1997, Seoul, Korea. [25] Jaewon Seo, Sunggu Lee and Jong Kim, "Synchronous Load Balancing in Hypercube Multicomputers with Faulty Nodes," 1997 International Conference on Parallel and Distributed Systems (ICPAD), pp 414-421, Dec. 1997, Seoul, Korea. [26] B. S. Yoo, C. R. Das, and Jong Kim, "A Performance Modeling Technique for Mesh-Connected Multicomputers," 1997 International Conference on Parallel and Distributed Systems (ICPAD), pp 408-413, Dec. 1997, Seoul, Korea. [27] B. J. Kim, J. Kim, S. J. Hong, and S. G. Lee, "A Real-Time Communication Method for Wormhole Switching Networks," 1998 International Conference on Parallel Processing (ICPP-27), pp. 527--534, Aug. 1998, Minneapolis, U.S.A. [28] Y. H. Lee, J. Kim, and S. J. Hong, "A New Multicast Tree Rearrangement Algorithm," IASTED International Conference on Parallel and Distributed Computer and Networks, Dec. 1998, Brisbane, Australia. [29] H. C. Nam, J. Kim, S. J. Hong, and S. Lee, "A Reliable Probabilistic Checkpointing," IEEE Pacific-Rim International Symposium on Dependable Computing, pp. 153--160, HongKong, Dec. 1999. [30] H. Lee, J. Kim, S. J. Hong, and S. Lee, "Task Scheduling using a Block Dependency DAG for Block-Oriented Sparse Cholesky Factorization," To appear on Symposium on Applied Computing 2000, Como, Italy, Mar. 2000. TECHNICAL REPORTS: [1] J. Kim, C. R. Das, W. Lin, and M. J. Thazhuthaveetil, Reliability Analysis of Hypercube Multicomputer, Technical Report TR-88-052, Computer Engineering Program, Dept. of E. E., The Pennsylvania State Univ., 1988. [2] C. R. Das and J. Kim, A Task-based Availability Model for Hypercube Computers, Technical Report TR-88-065, Computer Engineering Program, Dept. of E. E., The Pennsylvania State Univ., 1988. [3] J. Kim, C. R. Das, and W. Lin, A Top-down Processor Allocation Scheme for Hypercube Computers, Technical Report TR-89-067, Computer Engineering Program, Dept. of E. E., The Pennsylvania State Univ., 1989. [4] J. Kim, H.~Lee, and S.~Lee, ``Load balancing process allocation in fault-tolerant multicomputers,'' Technical Report CS-95-001, Dept. of Computer Science and Engineering, Pohang University of Science and Technology, 1995. [5] S.~Chae, J.~Kim, D.~Kim, S.~Hong, and S.~Lee, ``{DTN} : A new partitionable torus topology,'' Tech. Rep. CS-95-002, Department of Computer Science and Engineering, Pohang University of Science and Technology, 1995. HONORS AND AWARDS: ================= IEEE Computer Society Outstanding Paper Award, ``Modeling Wormhole routing in a Hypercube,'' presented at the 11th International Conference on Distributed Computing Systems, Arlington, May 1991. Daniel L. Slotnick Award for the Most Original Paper, ``A Processor Allocation Scheme for Hypercube Computers," presented at the 18th International Conference on Parallel Processing, Chicago, August 1989. PROFESSIONAL ACTIVITIES: ======================= Member, IEEE (Computer Society) Referee, IEEE Computer Special Issue on Fault-Tolerant Systems Referee, IEEE Transactions on Computers Referee, IEEE Transactions on Parallel and Distributed Systems Referee, IEEE Transactions on Reliability Referee, International Conference on Parallel Processing